Ben Han Location
- Santa Clara, CA, US
Ben Han Work
- 2017 - now Principal Engineer @
- 2006 - now staff design engr @
- 2001 - 2006 design manager @
- 2001 - 2002 verification engineer @
- 1997 - 1999 senior design engieer @
Ben Han Education
- University of Southern California
MSEE
1987 - 1989
Ben Han Skills
- Static Timing Analysis
- SoC
- RTL design
- Microsoft Excel
- Verilog
- Graphic Design
- Semiconductors
- IC
- Design
- Project Planning
- Management
- ASIC
- Logic Synthesis
- Electronics
- VLSI
Ben Han Summary
- Ben Han, based in Santa Clara, CA, US, is currently a Principal Engineer at Marvell Semiconductor. Ben Han brings experience from previous roles at Marvell Semiconductor, Exar Corp., BRECIS Communications and fujitsu microelectronics. Ben Han holds a 1987 - 1989 MSEE @ University of Southern California. With a robust skill set that includes Static Timing Analysis, SoC, RTL design, Microsoft Excel, Verilog and more. Ben Han has 2 emails on RocketReach.
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