Avinash Satish's Location
Melrose, MA, US
Avinash Satish's Work
- Graduate Design Intern - VIP @ Cadence Design Systems
- ASIC Verification Engineer @ Intel Corporation (from Wipro Technologies)
Avinash Satish's Education
University of Minnesota-Twin Cities
Master’s Degree (Electrical and Electronics Engineering - Digital VLSI)
2014 - 2015
Visvesvaraya Technological University
Bachelor of Engineering (B.E.) (Instrumentation Technology)
2007 - 2011
Avinash Satish's Skills
Avinash Satish's Summary
Avinash Satish, based in Melrose, MA, US, is currently a Graduate Design Intern - VIP at Cadence Design Systems, bringing experience from previous roles at Intel Corporation (from Wipro Technologies). Avinash Satish holds a 2014 - 2015 Master’s Degree in Electrical and Electronics Engineering - Digital VLSI @ University of Minnesota-Twin Cities. With a robust skill set that includes Bus Function, Coverage Driven, Coverage Driven Verification, Open Verification, Bus Function Model Development and more, Avinash Satish contributes valuable insights to the industry. Avinash Satish has 4 emails and 1 mobile phone number on RocketReach.