Arjun P Email
Senior Design Verification Engineer @ NVIDIA
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Arjun P Location
- Santa Clara, CA, US
Arjun P Work
- Senior Design Verification Engineer @ (July 2020 - Present)
Arjun P Education
- University of Massachusetts Amherst
Master of Science (Computer Engineering)
2012-2014 -
Bachelor of Engineering (Electronics)
2007-2011
Arjun P Skills
- ASIC
- Cadence Virtuoso
- Computer Architecture
- Debugging
- Functional Verification
- HSPICE
- LaTeX
- OVM
- Perl
- SoC
- SoC Verification Methodology
- System on a Chip (SoC)
- SystemVerilog
- VHDL
- VLSI
- Verilog
Arjun P Summary
- Arjun P, based in Santa Clara, CA, US, is currently a Senior Design Verification Engineer at NVIDIA. Arjun P holds a 2012 - 2014 Master of Science in Computer Engineering @ University of Massachusetts Amherst. With a robust skill set that includes ASIC, Cadence Virtuoso, Computer Architecture, Debugging, Functional Verification and more. Arjun P has 2 emails on RocketReach.
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