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Anand L Location
San Francisco, CA, US
Anand L Work
Senior IC Design Engineer @ (January 2010 - Present)
Senior Project Engineer @ (January 2008 - July 2010)
Project Engineer @ (January 2006 - December 2008)
Trainee Engineers @ (January 2005 - December 2006)
Anand L Education
Manipal Institute of Technology
M.Tech (DEAC)
2002-2004
ISRO project
Siddaganga Institute of Technology, Tumakuru (SIT Tumkur)
Anand L Skills
Physical Design
Timing Closure
Static Timing Analysis
Floorplanning
DRC
LVS
Physical Verification
Anand L Summary
Anand L, based in San Francisco, CA, US, is currently a Senior IC Design Engineer at Synapse Design Automation Inc.. Anand L brings experience from previous roles at Wipro Technologies and Clogic. Anand L holds a 2002 - 2004 M.Tech in DEAC @ Manipal Institute of Technology. With a robust skill set that includes Physical Design, Timing Closure, Static Timing Analysis, Floorplanning, DRC and more. Anand L has 1 emails on RocketReach.
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