Technical Manager Physical Design @ (January 2024 - February 2026)
Project Engineer @ (September 2010 - July 2014)
Physical Design, Mask Design, Synthesis,DFT Impl and STA Engineer @ (September 2010 - October 2012)
Ajay Kumar Education
ITER, SOA University, Bhubaneswar
Master of Technology (M.Tech.) (VLSI Design & Embedded System)
2008-2010
Ajay Kumar Skills
Static Timing Analysis
Unix
Conformal LEC
Physical Design
Physical Verification
Makefile
Synthesis
DFT Scan Insertion
RTL Compiler
Goldtime
ICC
Cadence Encounter
Timing Closure
Logic Synthesis
DRC
GNU Make
SoC
TCL
ASIC
VLSI
ICC-II
Integrated Circuit Design
PT-SI
Very-Large-Scale Integration (VLSI)
Application-Specific Integrated Circuits (ASIC)
System on a Chip (SoC)
Design Rule Checking (DRC)
Layout Versus Schematic (LVS)
Innovus
7nm
10nm
Ajay Kumar Summary
Ajay Kumar, based in Santa Clara, CA, US, is currently a Senior Technical Manager (Physical Design) at Synapse Design Inc.. Ajay Kumar brings experience from previous roles at Synapse Design Inc. and Wipro Technologies. Ajay Kumar holds a 2008 - 2010 Master of Technology (M.Tech.) in VLSI Design & Embedded System @ ITER, SOA University, Bhubaneswar. With a robust skill set that includes Static Timing Analysis, Unix, Conformal LEC, Physical Design, Physical Verification and more. Ajay Kumar has 4 emails and 1 mobile phone numbers on RocketReach.
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