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Amit Rane Location
Santa Clara, CA, US
Amit Rane Work
2025 -now Distinguished Engineer @
2007 -2025 Analog IC Design Leader (SMTS) @
2007 -2025 Analog IC Design Manager responsible for USB and 56Gbps+ PAM4 products @
1998 -2007 Design Manager @
Amit Rane Education
University of California, Berkeley 2011-2011
UCLA
Veermata Jijabai Technological Institute (VJTI)
Amit Rane Summary
Amit Rane, based in Santa Clara, CA, US, is currently a Distinguished Engineer at Astera Labs. Amit Rane brings experience from previous roles at Texas Instruments and Intel. Amit Rane holds a 2011 - 2011 University of California, Berkeley. Amit Rane has 2 emails and 1 mobile phone numbers on RocketReach.
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