Alexander Vlasenko Email
Principal Member of Technical Staff and Methodology Lead @ AIStorm INC
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Alexander Vlasenko Location
- Graz, AT
Alexander Vlasenko Work
- 2025 -now Principal Member of Technical Staff and Methodology Lead @
- 2019 -2025 Principal Digital Design Engineer and SoC Digital Lead @
- 2017 -2019 Principal Digital Design Engineer and RTL @
- 2016 -2017 Senior Digital Design Engineer and SoC Digital Lead @
- 2005 -2015 Digital Design Engineer and RTL and Backend @
- 1998 -2000 Junior Digital Design Engineer and PCB, FPGA @
Alexander Vlasenko Education
- Cadence Design Systems Education Services
(Trainings, Digital Design)
2004-2021 - Moscow Aviation Institute (State Technical University) (MAI)
(Master of Science (MSc), Electronics)
1994-2000
Alexander Vlasenko Skills
- ASIC
- FPGA
- Mixed Signal
- SoC
- Digital Hardware Design
- System Level Design
- Functional Verification
- RTL coding
- Static Timing Analysis
- ATPG
- Silicon Debug
- SystemVerilog
- Verilog
- VHDL
- TCL
- C
- C++
- RTL design
- Debugging
- NCSim
- ModelSim
- Digital Signal Processors
- Digital Electronics
- DFT
- Embedded Software
- Processors
- ARM
- Low-power Design
- IC
- Integrated Circuit Design
- Orcad
- Altera Quartus
- CMOS
- FPGA prototyping
- PCB design
- Analog Circuit Design
- Hardware Architecture
- Cadence
- Testing
- Semiconductors
- Embedded Systems
- Graphic Design
- Project Management
- Low Power Design
- Customer Service
- Java
- Microsoft Excel
- Marketing Strategy
Alexander Vlasenko Summary
- Alexander Vlasenko, based in Graz, AT, is currently a Principal Member of Technical Staff and Methodology Lead at AIStorm Inc.. Alexander Vlasenko brings experience from previous roles at Renesas Electronics, NXP Semiconductors Austria, Toshiba Electronics Europe GmbH and Melexis. Alexander Vlasenko holds a 2004 - 2021 Cadence Design Systems Education Services. With a robust skill set that includes ASIC, FPGA, Mixed Signal, SoC, Digital Hardware Design and more. Alexander Vlasenko has 1 emails on RocketReach.
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