Peter Drabos Email
Design Manager and senior principal architect @ AIStorm INC
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Peter Drabos Location
- Austria
Peter Drabos Work
- 2018 -now Design Manager and senior principal architect @
- 2016 -now Principal analog design engineer @
- 2014 -2016 Design Manager(Mixed Signal Design and Automotive BU) and Analog Technical Lead @ Toshiba Electronics Europe GmbH
- 2008 -2013 Analog Design Engineer @
- 2005 -2005 trainee @ General Electric Lighting
Peter Drabos Education
- University of Oulu
Microelectronics
2007-2007 - Budapest University of Technology and Economics
Master of Science (MSc) (Electrical Engineering)
2002-2007
Peter Drabos Skills
- Analog Circuit Design
- CMOS
- Mixed Signal
- Mixed-Signal IC Design
- Cadence Virtuoso
- Cadence Spectre
- Matlab
- Embedded Systems
- ASIC
- Analog
- Integrated Circuit Design
- IC
- Power Management
- Microelectronics
- PLL
- BiCMOS
- Semiconductors
- SoC
- Application-Specific Integrated Circuits (ASIC)
- Integrated Circuits (IC)
- System on a Chip (SoC)
- Mixed Signal Ic Design
- Illustrator
- Application Specific Integrated Circuits Asic
- Project Management
- Java
- Sales
- Integrated Circuits Ic
- Microsoft Office
- Integrated Circuit
- System on a Chip Soc
- Application Specific Integrated Circuits
- Integrated Circuits
- System on a Chip
Peter Drabos Summary
- Peter Drabos, based in Austria, is currently a Design Manager and senior principal architect at AIStorm INC. Peter Drabos brings experience from previous roles at Dialog Semiconductor, Toshiba Electronics Europe GmbH, NXP Semiconductors and General Electric Lighting. Peter Drabos holds a 2007 - 2007 Microelectronics @ University of Oulu. With a robust skill set that includes Analog Circuit Design, CMOS, Mixed Signal, Mixed-Signal IC Design, Cadence Virtuoso and more. Peter Drabos has 4 emails on RocketReach.
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