Aleksander Łoś Email
Design and Verification Engineer @ QBayLogic
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Aleksander Łoś Location
- Warsaw, PL
Aleksander Łoś Work
- now
- 2022 -2024 Verification Engineer @
- 2024 -now Design and Verification Engineer @
- 2019 -2021 ASIC Verification Engineer | Python Developer @
- 2018 -2019 Design Engineer @
- 2017 -2017 Digital Systems Specialist in R and D Department @
- 2015 -2017 Programmer and VHDL Designer @ Space Research Centre - Polish Academy of Sciences
- 2015 -2015 Intern @ Space Research Centre - Polish Academy of Sciences
- 2013 -2013 Intern @
- 2012 -2012 Intern @
- 2022 -2023 Design and Verification Engineer @
Aleksander Łoś Education
- Uniwersytet Warszawski 2012-2016
- University of Warsaw 2010
Aleksander Łoś Skills
- C
- C++
- Python
- VHDL
- FPGA
- Linux
- Microcontroller Programming
- Assembler
- PCB Design
- Writing Device Drivers
- Visual Basic
- Altium Designer
- Verilog
- Machine Learning
- Bash
- Matlab
- LaTeX
- SystemVerilog
- Octave
- Jenkins
- Ci/Cd
- Git
- SVN
Aleksander Łoś Summary
- Aleksander Łoś, based in Warsaw, PL, is currently a Design and Verification Engineer at QBayLogic. Aleksander Łoś brings experience from previous roles at QBayLogic, Codasip, TDK InvenSense and Cadence Design Systems. Aleksander Łoś holds a 2012 - 2016 Uniwersytet Warszawski. With a robust skill set that includes C, C++, Python, VHDL, FPGA and more. Aleksander Łoś has 1 emails on RocketReach.
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