QBayLogic Information

We design digital chips (FPGA and ASIC) for secure, high-speed communication. Our work starts where teams have tried it themselves and hit a wall on latency, throughput or security. Most FPGA and ASIC work is still verified by hand. We work differently: functional programming gets us to a working prototype early, and formal verification proves the design is correct before it ships. Our own open-source compiler, Clash, ties the two together, which is how we get it right the first time and can prove it. We focus on three areas: • Free-space secure communication • Cryptography and formally verified hardware (Clash Formal) • Quantum communication Synchronization for distributed systems (bittide) runs across all three. We have worked with Google, Demcon and Myrtle.ai, and published a paper on bittide with Google DeepMind and Stanford. Because our software and hardware engineers work in one team, domain knowledge, compiler expertise and formal methods meet in the same room. We started in 2016 as a two-person spin-off of the University of Twente in Enschede, the Netherlands. Since 2023 we have been steward-owned which keeps us independent. We are also ISO 9001 certified by BSI. Tell us what you're building and where you're stuck, and we'll tell you how we'd solve it.