Ajay Kumar Location
- California, United States
Ajay Kumar Work
- 2025 - now Member of Technical Staff @
- 2015 - 2025 Component Design Engineer @
- 2013 - 2015 Graduate Research Assistant @
- 2014 - 2015 Graduate teaching assistant (GTA) for Digital Design and Laboratory @
- 2012 - 2013 VLSI_DFT Design Engineer II @
- 2012 - 2013 VLSI_DFT Design Engineer - II @
- 2012 - 2012 VLSI_DFT Design Engineer -II @
- 2010 - 2012 VLSI Project Engineer @
Ajay Kumar Education
- San Francisco State University 2013 - 2015
- Visvesvaraya Technological University 2006 - 2010
Ajay Kumar Skills
- Verilog
- VLSI
- VHDL
- Static Timing Analysis
- Perl
- Debugging
- C
- SoC
- Integrated Circuit Design
- ASIC
- Simulations
- RTL Design
- NCSim
- SystemVerilog
- ATPG
- Xilinx ISE
- Model Sim, VCS,TETRAMAX,
- DFT Compiler
- Shell Scripting
- Primetime
- hspice
- Cdesigner
- System Verilog
- ICC
- UPF
- Physical Design
- LVS
- DRC
- TCL
- Scan Insertion
- Layout Design
- SPICE
- DFT
- Model Sim
- Laboratory
- Customer Service
- Digital Marketing
- Microsoft Word
- Microsoft Office
- Project Management
- Tetramax
- Management
- VCS
- Digital Electronics
- H.264
- Video Compression
- Electronics
- Integrated Circuits Ic
- Semiconductor Industry
- Search
- Semiconductors
- Design
- Unix
- Integrated Circuits
Ajay Kumar Summary
- Ajay Kumar, based in California, United States, is currently a Member of Technical Staff at AXONNE. Ajay Kumar brings experience from previous roles at Intel Corporation, San Francisco State University and Texas Instruments. Ajay Kumar holds a 2013 - 2015 San Francisco State University. With a robust skill set that includes Verilog, VLSI, VHDL, Static Timing Analysis, Perl and more. Ajay Kumar has 3 emails on RocketReach.
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