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Adam Ley Location
Plano, TX, US
Adam Ley Work
VP, Chief Technologist @ (March 1999 - Present)
Senior Member, Technical Staff @ (January 1986 - January 1999)
Student Laboratory Assistant @ (August 1985 - May 1986)
Engineering Intern @ (June 1985 - August 1985)
Adam Ley Education
Oklahoma State University
BSEE (Electrical Engineering)
1982-1986
Adam Ley Skills
JTAG
DFT
Boundary Scan
Semiconductors
Testing
Debugging
IC
Embedded Systems
Test Engineering
Electronics
SoC
Hardware Architecture
Mixed Signal
Verilog
EDA
Technical Marketing
Electrical Engineering
Analog
FPGA
PCB design
Microprocessors
Embedded Software
Test Equipment
Processors
Failure Analysis
Engineering Management
Circuit Design
Firmware
Simulations
Hardware
Analog Circuit Design
Leadership Development
Leadership
Joint Test Action Group (JTAG)
Integrated Circuits (IC)
System on a Chip (SoC)
System On A Chip Soc
Integrated Circuits Ic
Joint Test Action Group Jtag
Joint Test Action Group
Integrated Circuits
System on a Chip
Adam Ley Summary
Adam Ley, based in Plano, TX, US, is currently a VP, Chief Technologist at ASSET InterTech, Inc.. Adam Ley brings experience from previous roles at Texas Instruments Incorporated, Oklahoma State University and United States Air Force. Adam Ley holds a 1982 - 1986 BSEE in Electrical Engineering @ Oklahoma State University. With a robust skill set that includes JTAG, DFT, Boundary Scan, Semiconductors, Testing and more. Adam Ley has 2 emails and 2 mobile phone numbers on RocketReach.
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