Zi An's Location
Chaoyang Qu, Beijing, China
Zi An's Work
- Senior Director R and D and Chief chip Architect @ vivo
- Chief cpu and soc and AI architect of PDT, hisilicon @ Hisilicon
- lead cpu and soc and AI architect @ Hisilicon Semiconductor Co. Ltd, HUAWEI Electrical P.R.China . (Beijing Branch
- Chief SE of Balong and kirin @ Hisilicon Semiconductor Co. Ltd, HUAWEI Electrical P.R.China . (Beijing Branch
- Chief SE of Balong @ Hisilicon Semiconductor Co. Ltd, HUAWEI Electrical P.R.China . (Beijing Branch
- SE and PM of DTV @ Hisilicon Semiconductor Co. Ltd, HUAWEI Electrical P.R.China . (Beijing Branch
- PM of SOC @ BLXCPU IC Design (Beijing) Co. Ltd, P.R.China .
Zi An's Education
- University of Electronic Science and Technology
Zi An's Skills
- 半导体
- 嵌入式系统
- 集成电路
- ASIC
- 系统芯片
- processor
- soc
- AP
- Baseband
- Java
Zi An's Summary
Zi An, based in Chaoyang Qu, Beijing, China, is currently a Senior Director R and D and Chief chip Architect at vivo, bringing experience from previous roles at 海思 and Hisilicon Semiconductor Co. Ltd, HUAWEI Electrical P.R.China . (Beijing Branch. Zi An holds a University of Electronic Science and Technology. With a robust skill set that includes 半导体, 嵌入式系统, 集成电路, ASIC, 系统芯片 and more, Zi An contributes valuable insights to the industry. Zi An has 1 email on RocketReach.
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