Zeyu Bu's Location
Santa Clara, California, United States
Zeyu Bu's Work
- Design Verification Engineer @ Apple
- IP Design Verification Engineer @ Intel Corporation
- SoC Design Verification Engineer @ Intel Corporation
- Interim Engineering Intern @ Qualcomm
Zeyu Bu's Education
- University of Michigan
Master of Science (MS) (VLSI @ DIGITAL CIRCUIT DESIGN)
2014 - 2016 - Shanghai Jiao Tong University
Bachelor of Science (BS) (Electrical and Electronics Engineering)
2010 - 2014
Zeyu Bu's Skills
- VLSI
- Cadence
- C
- Verilog
- Circuit Physical Design
- Matlab
- Circuit Synthesis and Optimization
- VHDL
- Nc Verilog
- Computer Architecture
Zeyu Bu's Summary
Zeyu Bu, based in Santa Clara, California, United States, is currently a Design Verification Engineer at Apple, bringing experience from previous roles at Intel Corporation and Qualcomm. Zeyu Bu holds a 2014 - 2016 Master of Science (MS) in VLSI @ DIGITAL CIRCUIT DESIGN @ University of Michigan. With a robust skill set that includes VLSI, Cadence, C, Verilog, Circuit Physical Design and more, Zeyu Bu contributes valuable insights to the industry. Zeyu Bu has 2 emails and 1 mobile phone number on RocketReach.
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