Design Verification Engineer @ (May 2015 - October 2021)
Design Verification Engineer @ (August 2011 - May 2015)
Design Verification Engineer @ (August 2008 - December 2010)
Verification Engineer @ (August 2007 - July 2008)
Zeeshan A Education
San Francisco State University
Masters of Science (Electrical and Computer Engineering)
NED University of Engineering and Technology
Bachelor of Engineering - BE (Electrical and Electronics Engineering)
Zeeshan A Summary
Zeeshan A, based in Santa Clara, CA, US, is currently a Senior Verification Engineer at AMD. Zeeshan A brings experience from previous roles at Intel Corporation, Intel, Synopsys and GDA Technologies. Zeeshan A holds a Masters of Science in Electrical and Computer Engineering @ San Francisco State University. Zeeshan A has 3 emails and 3 mobile phone numbers on RocketReach.
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