Yufei Wang's Location
San Francisco, California, United States
Yufei Wang's Work
- Senior Analog RFIC Design Engineer @ Qualcomm
- RF Application Engineer Intern @ NXP Semiconductors
Yufei Wang's Education
- Columbia University in the City of New York
Master of Science (M.S.) (Electrical and Electronics Engineering)
2014 - 2015 - University of Toronto
Bachelor of Applied Science (B.A.Sc.) (Engineering Science, Electrical and Computer Engineering Major)
2010 - 2014
Yufei Wang's Skills
- Matlab
- Python
- Synopsys tools
- Cadence Virtuoso
- Mixed Signal Ic Design
- Agilent ADS
- Verilog
- Mandarin
- Protel
- Eagle PCB
Yufei Wang's Summary
Yufei Wang, based in San Francisco, California, United States, is currently a Senior Analog RFIC Design Engineer at Qualcomm Atheros, bringing experience from previous roles at NXP Semiconductors. Yufei Wang holds a 2014 - 2015 Master of Science (M.S.) in Electrical and Electronics Engineering @ Columbia University in the City of New York. With a robust skill set that includes Matlab, Python, Synopsys tools, Cadence Virtuoso, Mixed Signal Ic Design and more, Yufei Wang contributes valuable insights to the industry. Yufei Wang has 4 emails on RocketReach.
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