Yuan Si Email
Senior CPU Architect @ HYGON
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Yuan Si Location
- Shanghai, China
Yuan Si Work
- Senior CPU Architect @ (January 2021 - Present)
- FPGA Engineer @ (May 2017 - January 2021)
- Design Verification Engineer Intern @ (February 2017 - May 2017)
Yuan Si Education
- University of Southern California
Master’s Degree
2015-2017 - University of Electronic Science and Technology
Bachelor’s Degree
2011-2015
Yuan Si Skills
- SystemVerilog
- Field-Programmable Gate Arrays (FPGA)
- Python
- Machine Learning
- Ethernet
- C++
- C
- Perl
- MATLAB
- Linux
- Verilog
- TCL
- ModelSim
- Cadence Virtuoso
- NCSim
- Xilinx
- Universal Verification Methodology (UVM)
- Hspice
- Design Compiler
- Conformal LEC
- Cadence Encounter
- Synopsys Primetime
- Signal Integrity
- Power Optimization
- FPGA prototyping
- Formal Verification
- Synopsys tools
- System on a Chip (SoC)
- SimpleScalar
- Altera Quartus
- Vivado
- DDR
- Microblaze
Yuan Si Summary
- Yuan Si, based in Shanghai, China, is currently a Senior CPU Architect at HYGON. Yuan Si brings experience from previous roles at RF DSP Inc.. Yuan Si holds a 2015 - 2017 Master’s Degree @ University of Southern California. With a robust skill set that includes SystemVerilog, Field-Programmable Gate Arrays (FPGA), Python, Machine Learning, Ethernet and more. Yuan Si has 3 emails on RocketReach.
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