Yuan Si Location
- Shanghai, China
Yuan Si Work
- 2021 - now Senior CPU Architect @
- 2017 - 2021 FPGA Engineer @
- 2017 - 2017 Design Verification Engineer Intern @
Yuan Si Education
- University of Southern California
Master’s Degree
2015 - 2017 - University of Electronic Science and Technology
Bachelor’s Degree
2011 - 2015
Yuan Si Skills
- SystemVerilog
- Field-Programmable Gate Arrays (FPGA)
- Python
- Machine Learning
- Ethernet
- C++
- C
- Perl
- MATLAB
- Linux
- Verilog
- TCL
- ModelSim
- Cadence Virtuoso
- NCSim
- Xilinx
- Universal Verification Methodology (UVM)
- Hspice
- Design Compiler
- Conformal LEC
- Cadence Encounter
- Synopsys Primetime
- Signal Integrity
- Power Optimization
- FPGA prototyping
- Formal Verification
- Synopsys tools
- System on a Chip (SoC)
- SimpleScalar
- Altera Quartus
- Vivado
- DDR
- Microblaze
Yuan Si Summary
- Yuan Si, based in Shanghai, China, is currently a Senior CPU Architect at HYGON. Yuan Si brings experience from previous roles at RF DSP Inc.. Yuan Si holds a 2015 - 2017 Master’s Degree @ University of Southern California. With a robust skill set that includes SystemVerilog, Field-Programmable Gate Arrays (FPGA), Python, Machine Learning, Ethernet and more. Yuan Si has 2 emails on RocketReach.
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Top HYGON Employees
Linglan Zhang
VP of Engineering
California, United States
Panyong Zhang
Senior Software Manager
Beijing, CN
Dongqing Chen
SMTS ATE
Suzhou, CN
Yuan Si
Senior CPU Architect
Shanghai, China
Feng Zeng
Principal Engineer and Design Manager
Shanghai, CN
Fang Wang
High Speed IO Verification Manager
Shanghai, China
良 董
Member Of Technical Staff
Shanghai, China
Vincent Tu
Senior Staff Design Verification
Shanghai, CN
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