Yu-Ping Wang's Location
California, United States
Yu-Ping Wang's Work
- Senior ASIC Engineer @ Lemurian Labs
- Senior Application Engineer @ Agnisys Technology
- Staff Engineer @ SK hynix memory solutions America Inc.
- Contract Validation Engineer @ Intel Corporation
- Senior IC Design Engineer @ UPEK
- Senior IC Design Engineer @ STMicroelectronics
- Design Engineer @ National Semiconductor
- Design Engineer @ Cirrus Logic
Yu-Ping Wang's Education
- Santa Clara University
Master Of Science (Electrical Engineering)
1993 - 1995 - University Of California - Berkeley
Bachelor Of Science (Electrical Engineering)
1988 - 1993
Yu-Ping Wang's Skills
- Logic Design
- Git
- Debugging
- Modular
- Windows
- Functional Verification
- JIRA
- Interface Design
- NCSim
- USB
Yu-Ping Wang's Summary
Yu-Ping Wang, based in California, United States, is currently a Senior ASIC Engineer at Lemurian Labs, bringing experience from previous roles at Agnisys Inc, SK Hynix Memory Solutions, Intel Corporation and UPEK. Yu-Ping Wang holds a 1993 - 1995 Master Of Science in Electrical Engineering @ Santa Clara University. With a robust skill set that includes Logic Design, Git, Debugging, Modular, Windows and more, Yu-Ping Wang contributes valuable insights to the industry. Yu-Ping Wang has 2 emails on RocketReach.
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