Yj Xiao's Location
Shanghai, China
Yj Xiao's Work
- Director @ GUC
- Director of Engineering Design Team @ Brite Semiconductor
- Design Manager @ Brite Semiconductor
- Sr. ASIC Design Implementation Engineer @ NXP acquires Freescale Semiconductor
- Sr. ASIC Design Implementation Engineer @ IPCore Technologies (Shanghai) Corp.
- Sr. ASIC Design Implementation Engineer @ Auvitek Corporation
- ASIC Design Engineer @ IPCore Technologies (Shanghai) Corp.
Yj Xiao's Education
- Guilin University of Electronic Technology2000 - 2003
- Wuhan University of Technology1995 - 1999
Yj Xiao's Skills
- ASIC
- SoC
- IC
- Static Timing Analysis
- RTL design
- Logic Synthesis
- FPGA
- Formal Verification
- Digital Signal Processors
- RTL coding
Yj Xiao's Summary
YJ Xiao, based in Shanghai, China, is currently a Director at GUC, bringing experience from previous roles at Britesemi, Freescale Semiconductor (Shanghai) and IPCore Technologies (Shanghai) Corp.. YJ Xiao holds a 2000 - 2003 Guilin University of Electronic Technology. With a robust skill set that includes ASIC, SoC, IC, Static Timing Analysis, RTL design and more, YJ Xiao contributes valuable insights to the industry. YJ Xiao has 2 emails on RocketReach.
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