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Yifeng Wang Location
San Jose, CA, US
Yifeng Wang Work
2013 -now Senior Architect, Group Director @
2013 -2025 Member Technical @ Synopsys, Inc
2010 -2013 Architect @
2007 -2010 Architect @
2003 -2007 Engineering Manager @
1999 -2003 R and D Manager @ Verplex Design Systems, Inc
Yifeng Wang Education
UC San Diego
Postdoctorate (CSE)
1994-1997
Tsinghua University
Ph.D/MS/BS (EE, CS)
1982-1994
Yifeng Wang Skills
Hardware Architecture
Logic Design
Logic Synthesis
Functional Verification
RTL design
Processors
ASIC
VLSI
Verilog
Formal Verification
Integrated Circuit Design
TCL
CMOS
Datapath Optmization
RTL coding
Rtl
SoC
VHDL
EDA
Timing Closure
SystemVerilog
Physical Design
SystemC
Static Timing Analysis
Low Power Design
Yifeng Wang Summary
Yifeng Wang, based in San Jose, CA, US, is currently a Senior Architect, Group Director at Cadence. Yifeng Wang brings experience from previous roles at Synopsys, Inc and Cadence Design Systems, Inc. Yifeng Wang holds a 1994 - 1997 Postdoctorate in CSE @ UC San Diego. With a robust skill set that includes Hardware Architecture, Logic Design, Logic Synthesis, Functional Verification, RTL design and more. Yifeng Wang has 2 emails on RocketReach.
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