Yi Rao Email & Phone Number
Staff Design Engineer @ SK hynix memory solutions America Inc.
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Yi Rao Location
- San Jose, CA, US
Yi Rao Work
- Staff Design Engineer @ (June 2014 - Present)
- Design Engineer @ (November 2011 - June 2014)
- Senior Design Engineer @ (November 2009 - November 2011)
Yi Rao Education
- Syracuse University
MS (Electrical Engineering)
2007-2009 - ZHEJIGNG UNIVERSITY, College of Engineering
BS (Electrical Engineering)
2000-2004
Yi Rao Skills
- Perl
- Static Timing Analysis
- Verilog
- System on a Chip (SoC)
- DFT
- Low-power Design
- Design
- Rice
- Low Power Design
- System On A Chip Soc
- Asic Design
- System on a Chip
Yi Rao Summary
- Yi Rao, based in San Jose, CA, US, is currently a Staff Design Engineer at SK hynix memory solutions inc.. Yi Rao brings experience from previous roles at Intel Corporation and Marvell Semiconductor. Yi Rao holds a 2007 - 2009 MS in Electrical Engineering @ Syracuse University. With a robust skill set that includes Perl, Static Timing Analysis, Verilog, System on a Chip (SoC), DFT and more. Yi Rao has 2 emails and 2 mobile phone numbers on RocketReach.
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