Yi-Min Lin Email & Phone Number
Digital Design Engineer @ Google
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Yi-Min Lin Location
- San Jose, CA, US
Yi-Min Lin Work
- 2021 -now Digital Design Engineer @
- 2018 -2021 Principal Engineer @
- 2016 -2018 Senior Staff Engineer @
- 2012 -2016 Senior Staff Engineer @
- 2011 -2012 Postdoctoral Fellow @
- 2006 -2011 Consultant of Technology Transfer Cooperation @
- 2005 -2011 PHD Student @
Yi-Min Lin Education
- National Chiao Tung University
Doctor of Philosophy (Ph.D.) (Electrical and Electronics Engineering)
2005-2011 - National Tsing Hua University
Bachelor of Science (BS) (Electrical and Electronics Engineering)
2001-2005
Yi-Min Lin Skills
- Integrated Circuit Design
- Verilog
- C++ Language
- Matlab
- FPGA
- SPICE
- Logic Synthesis
- Encounter
- Conformal LEC
- IC
- SoC
- C
- VLSI
- ASIC
- System Verilog
- Python
- C++
- Algorithms
- Very-Large-Scale Integration (VLSI)
- Field-Programmable Gate Arrays (FPGA)
- System on a Chip (SoC)
- Application-Specific Integrated Circuits (ASIC)
- Firmware
- Field Programmable Gate Arrays Fpga
- System on a Chip Soc
- Application Specific Integrated Circuits Asic
- Very Large Scale Integration Vlsi
- Field Programmable Gate Arrays
- Very Large Scale Integration
- System on a Chip
- Application Specific Integrated Circuits
Yi-Min Lin Summary
- Yi-Min Lin, based in San Jose, CA, US, is currently a Digital Design Engineer at Google. Yi-Min Lin brings experience from previous roles at Micron Technology, Intel Corporation, SK hynix memory solutions inc. and University of California, Los Angeles. Yi-Min Lin holds a 2005 - 2011 Doctor of Philosophy (Ph.D.) in Electrical and Electronics Engineering @ National Chiao Tung University. With a robust skill set that includes Integrated Circuit Design, Verilog, C++ Language, Matlab, FPGA and more. Yi-Min Lin has 4 emails and 2 mobile phone numbers on RocketReach.
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