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Yi-Chen Li Location
Glen Rock, NJ, US
Yi-Chen Li Work
2022 -now Head of FPGA @
2018 -2021 Snr HW Design Engineer @
2014 -2018 Principal Design Engineer @
2012 -2013 Senior Member of Technical Staff @
2011 -2012 VP, Embedded Systems @
2007 -2011 Research ASIC Engineer @
2003 -2007 Snr. ASIC Design Engineer, SMTS @
2003 -2007 Snr. ASIC Engineer, SMTS @
2000 -2003 ASIC Design Engineer @
Yi-Chen Li Education
University of Sydney 1997-2000
Yi-Chen Li Skills
FPGA
ASIC
Digital Signal Processors
SystemVerilog
Verilog
VLSI
Semiconductors
Embedded Systems
C
Algorithms
Microprocessors
SoC
Matlab
Xilinx
Ultra Low Latency
Microcontrollers
Exchange Connectivity
Hardware
VHDL
RTL design
SystemC
Wireless
OFDM
Systems Modeling
UMTS
WCDMA
HSDPA
Field-Programmable Gate Arrays (FPGA)
Field Programmable Gate Arrays Fpga
Applications
Edge
Engineering
DSP
Design
Digital Signal
Field Programmable Gate Arrays
Yi-Chen Li Summary
Yi-Chen Li, based in Glen Rock, NJ, US, is currently a Head of FPGA at BlackEdge Capital. Yi-Chen Li brings experience from previous roles at Vatic Labs , VOLANT TRADING, Wave Computing and Zomojo. Yi-Chen Li holds a 1997 - 2000 University of Sydney. With a robust skill set that includes FPGA, ASIC, Digital Signal Processors, SystemVerilog, Verilog and more. Yi-Chen Li has 2 emails and 1 mobile phone numbers on RocketReach.
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