Ye Tang's Location
Palo Alto, CA, US
Ye Tang's Work
- ASIC Engineer @ Meta
- ASIC Design Tech Lead / Manager @ Google
- Staff ASIC Engineer @ Juniper Networks
- Senior ASIC Engineer @ NVIDIA
- ASIC Engineer @ Morpho Technologies
Ye Tang's Education
- UC Irvine
Master of Science (Computer Engineering)
2000 - 2001 - Tsinghua University
Bachelor of Science (Engineering)
1992 - 1997
Ye Tang's Skills
- Logic Design
- Computer Architecture
- Logic Synthesis
- Perl
- RTL design
- PCIe
- ASIC
- Timing
- VLSI
- Verilog
Ye Tang's Summary
Ye Tang, based in Palo Alto, CA, US, is currently a ASIC Engineer at Meta, bringing experience from previous roles at Google, Juniper Networks, NVIDIA and Morpho Technologies. Ye Tang holds a 2000 - 2001 Master of Science in Computer Engineering @ UC Irvine. With a robust skill set that includes Logic Design, Computer Architecture, Logic Synthesis, Perl, RTL design and more, Ye Tang contributes valuable insights to the industry. Ye Tang has 3 emails on RocketReach.
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