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Xu Chen Location
San Jose, CA, US
Xu Chen Work
2024 -now Hardware Design Manager @
2019 -2024 Digital Design Tech Lead @
2017 -2019 Senior ASIC Design Engineer @
2016 -2017 Senior Logic Design Engineer @
2013 -2016 Logic Design Engineer @
2012 -2012 Undergraduate Research Assistant @
Xu Chen Education
Stanford University
Master of Science (M.S.) (Electrical Engineering)
2013-2017
University of California, Berkeley
Bachelor of Science (B.S.) (Electrical Engineering and Computer Science)
2009-2013
Xu Chen Skills
Verilog
MIPS
C
Java
Scala
Python
Matlab
JavaScript
HTML
CSS
SPICE
ModelSim
Chipscope
Cadence
Synopsys tools
Labview
Git
LaTeX
Visio
Logic Design
Computer Hardware
Design
Xu Chen Summary
Xu Chen, based in San Jose, CA, US, is currently a Hardware Design Manager at Meta. Xu Chen brings experience from previous roles at Meta, Apple and Marvell Semiconductor. Xu Chen holds a 2013 - 2017 Master of Science (M.S.) in Electrical Engineering @ Stanford University. With a robust skill set that includes Verilog, MIPS, C, Java, Scala and more. Xu Chen has 4 emails and 3 mobile phone numbers on RocketReach.
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