Xu Chen Email & Phone Number
Hardware Design Manager @ Meta
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Xu Chen Location
- San Jose, CA, US
Xu Chen Work
- Hardware Design Manager @ (September 2024 - Present)
- Digital Design Tech Lead @ (September 2019 - September 2024)
- Senior ASIC Design Engineer @ (June 2017 - August 2019)
- Senior Logic Design Engineer @ (April 2016 - June 2017)
- Logic Design Engineer @ (July 2013 - March 2016)
- Undergraduate Research Assistant @ (January 2012 - December 2012)
Xu Chen Education
- Stanford University
Master of Science (M.S.) (Electrical Engineering)
2013-2017 - University of California, Berkeley
Bachelor of Science (B.S.) (Electrical Engineering and Computer Science)
2009-2013
Xu Chen Skills
- Verilog
- MIPS
- C
- Java
- Scala
- Python
- Matlab
- JavaScript
- HTML
- CSS
- SPICE
- ModelSim
- Chipscope
- Cadence
- Synopsys tools
- Labview
- Git
- LaTeX
- Visio
- Logic Design
- Computer Hardware
- Design
Xu Chen Summary
- Xu Chen, based in San Jose, CA, US, is currently a Hardware Design Manager at Meta. Xu Chen brings experience from previous roles at Meta, Apple and Marvell Semiconductor. Xu Chen holds a 2013 - 2017 Master of Science (M.S.) in Electrical Engineering @ Stanford University. With a robust skill set that includes Verilog, MIPS, C, Java, Scala and more. Xu Chen has 4 emails and 3 mobile phone numbers on RocketReach.
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