Xiaowen Han Email & Phone Number
DRAM Validation Engineer @ Apple
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Xiaowen Han Location
- Sunnyvale, CA, US
Xiaowen Han Work
- DRAM Validation Engineer @ (December 2017 - Present)
- Memory Validation Engineer @ (June 2015 - December 2017)
Xiaowen Han Education
- Columbia University
Master's Degree (Electrical and Electronics Engineering)
2013-2014 - Harbin Institute of Technology
Bachelor's Degree (Electrical and Electronics Engineering)
2009-2013
Xiaowen Han Skills
- ASIC design
- FPGA design
- RTL design
- Cadence Virtuoso
- Verilog
- SystemVerilog
- C++ Language
- Python
- Signal Processing
- C language
- SPICE
- C
- Electronics
- Pulse
- Data Validation
- Customer Service
- Hardware
- Networking
- Microsoft Excel
- Design
- Validation
- Analog
- Testing
- Education
- Engineering
Xiaowen Han Summary
- Xiaowen Han, based in Sunnyvale, CA, US, is currently a DRAM Validation Engineer at Apple. Xiaowen Han brings experience from previous roles at Intel Corporation. Xiaowen Han holds a 2013 - 2014 Master's Degree in Electrical and Electronics Engineering @ Columbia University. With a robust skill set that includes ASIC design, FPGA design, RTL design, Cadence Virtuoso, Verilog and more. Xiaowen Han has 2 emails and 4 mobile phone numbers on RocketReach.
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