Xiaohui Zhao Email & Phone Number
Principal MTS @ Rivos Inc.
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Xiaohui Zhao Location
- Saratoga, CA, US
Xiaohui Zhao Work
- 2023 -now Principal MTS @
- 2015 -now Lead Engineer and Senior Manager @
- 2012 -2015 Principal Engineer @
- 2010 -2012 Senior Staff Engineer @
- 2009 -2010 Asic Engineer 4 @
- 2005 -2009 Senior Design Verification Engineer @
- 2003 -2005 Software and Application Engineer @
Xiaohui Zhao Education
- University of Kentucky
Master Of Science (Computer Science)
2000-2001 - National University of Singapore
Master Of Engineering (Engineering)
1998-1999 - Shanghai Jiao Tong University
Bachelor Of Mechanical Engineering
Xiaohui Zhao Skills
- Leadership
- Hardware Architecture
- Communication
- Verilog/systemVerilog
- systemC/C++
- cache coherency/memory subsystems
- Processors
- switch/fabric
- highspeed link
- Testbench architecture
- verification methodology
- chip bringup
- ASIC
- Functional Verification
- UVM/VMM/RVM
- Flash
- PCIe
- DFT
- High Performance Computing
- V
- SoC
- Debugging
- FPGA
- Verilog
- TCL
- SystemVerilog
- RTL Design
- Simulations
- IC
- V&V
- device drivers
- PCIe and NVMe
Xiaohui Zhao Summary
- Xiaohui Zhao, based in Saratoga, CA, US, is currently a Principal MTS at Rivos Inc.. Xiaohui Zhao brings experience from previous roles at Scaleflux, Violin Memory, Huawei Technologies and Juniper Networks. Xiaohui Zhao holds a 2000 - 2001 Master Of Science in Computer Science @ University of Kentucky. With a robust skill set that includes Leadership, Hardware Architecture, Communication, Verilog/systemVerilog, systemC/C++ and more. Xiaohui Zhao has 2 emails and 2 mobile phone numbers on RocketReach.
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