Xiaofeng Yang Email
Senior Analog Design Engineer @ Reexen Technology
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Xiaofeng Yang Location
- Shenzhen, Guangdong Province, CN
Xiaofeng Yang Work
- Senior Analog Design Engineer @ (March 2019 - Present)
- Interim RFIC Engineer @ (December 2017 - March 2018)
- Analog Design Engineer @ 华为海思 (April 2014 - April 2015)
- Analog IC Designer @ (June 2012 - February 2013)
Xiaofeng Yang Education
- University of Macau
Doctor of Philosophy - PhD (Integrated Circuit Design)
2015-2019 - Nanyang Technological University Singapore
Master's degree (Integrated Circuit Design)
2011-2013 - Sun Yat-sen University
Bachelor's degree (Electrical and Electronics Engineering)
2007-2011
Xiaofeng Yang Skills
- Analog Circuit Design
- Analog IC Design
- C++ Language
- Circuit Design
- Matlab
- Mixed-Signal IC Design
- PCB design
Xiaofeng Yang Summary
- Xiaofeng Yang, based in Shenzhen, Guangdong Province, CN, is currently a Senior Analog Design Engineer at Reexen Technology. Xiaofeng Yang brings experience from previous roles at Qualcomm, 华为海思 and imec. Xiaofeng Yang holds a 2015 - 2019 Doctor of Philosophy - PhD in Integrated Circuit Design @ University of Macau. With a robust skill set that includes Analog Circuit Design, Analog IC Design, C++ Language, Circuit Design, Matlab and more. Xiaofeng Yang has 1 emails on RocketReach.
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