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Xiaofeng Wang Location
San Jose, CA, US
Xiaofeng Wang Work
2024 -now IC Design Engineer @
2013 -2024 ASIC Design Engineer @
Xiaofeng Wang Education
Arizona State University 2011-2013
Huazhong University of Science and Technology 2006-2010
Xiaofeng Wang Skills
Cadence Virtuoso
Verilog
CMOS
ASIC
Cadence Virtuoso Layout Editor
Digital Circuit Design
Physical Design
RTL design
Algorithms
VLSI Design
SATA
Memory
VLSI
Cadence Virtuoso Layout
Solutions
Xiaofeng Wang Summary
Xiaofeng Wang, based in San Jose, CA, US, is currently a IC Design Engineer at Broadcom. Xiaofeng Wang brings experience from previous roles at SK hynix memory solutions inc.. Xiaofeng Wang holds a 2011 - 2013 Arizona State University. With a robust skill set that includes Cadence Virtuoso, Verilog, CMOS, ASIC, Cadence Virtuoso Layout Editor and more. Xiaofeng Wang has 3 emails and 2 mobile phone numbers on RocketReach.
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