Xiaofeng Wang Email & Phone Number

Xiaofeng Wang, based in San Jose, CA, US, is currently a ASIC Design Engineer at SK hynix memory solutions inc., bringing experience from previous roles at SK hynix memory solutions inc.. Xiaofeng Wang holds a 2011 - 2013 Master of Science (M.S.) @ Arizona State University. With a robust skill set that includes Cadence Virtuoso, Verilog, CMOS, ASIC, Cadence Virtuoso Layout Editor and more, Xiaofeng Wang contributes valuable insights to the industry. Xiaofeng Wang has 2 emails and 1 mobile phone number on RocketReach.