William Yee Email & Phone Number
PMTS Design Verification @ AMD
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William Yee Location
- Westborough, MA, US
William Yee Work
- 2023 -now PMTS Design Verification @
- 2021 -2023 Technical DV Manager and Lead Design Verification Engineer @
- 2013 -2021 Technical Manager, Technical Lead, Principal FPGA design verification engineer @
- 2002 -2013 Senior FPGA Design and Verification Engineer and Project Lead @
- 2000 -2001 Senior FPGA Design and Verification Engineer @
- 1996 -2000 ASIC Engineer @
William Yee Education
- Boston Latin School
- Boston University
Bachelor of Engineering (Electronics Engineering)
William Yee Summary
- William Yee, based in Westborough, MA, US, is currently a PMTS Design Verification at AMD. William Yee brings experience from previous roles at Lightelligence, Casa Systems, Inc., Motorola and RiverDelta Networks. William Yee holds a Boston Latin School. William Yee has 2 emails on RocketReach.
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