William Yee Email & Phone Number
PMTS Design Verification @ AMD
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William Yee Location
- Westborough, MA, US
William Yee Work
- PMTS Design Verification @ (August 2023 - Present)
- Technical DV Manager and Lead Design Verification Engineer @ (September 2021 - August 2023)
- Technical Manager, Technical Lead, Principal FPGA design verification engineer @ (July 2013 - September 2021)
- Senior FPGA Design and Verification Engineer and Project Lead @ (January 2002 - July 2013)
- Senior FPGA Design and Verification Engineer @ (August 2000 - December 2001)
- ASIC Engineer @ (September 1996 - August 2000)
William Yee Education
- Boston Latin School
- Boston University
Bachelor of Engineering (Electronics Engineering)
William Yee Summary
- William Yee, based in Westborough, MA, US, is currently a PMTS Design Verification at AMD. William Yee brings experience from previous roles at Lightelligence, Casa Systems, Inc., Motorola and RiverDelta Networks. William Yee holds a Boston Latin School. William Yee has 2 emails on RocketReach.
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