Vinod Bhat's Location

San Jose, California, United States

Vinod Bhat's Work

  • ASIC Design Manager @ Meta
  • SoC Platform Architecture Program Manager @ Apple
  • Engineering Manager, Artificial Intelligence Product Group @ Intel Corporation

Vinod Bhat's Education

  • Stanford University

    MS (EE)

    2000 - 2002
  • Indian Institute of Technology, Bombay

    B Tech (Electrical Engineering)

    1996 - 2000

Vinod Bhat's Skills

  • RTL design
  • SoC
  • Verilog
  • Algorithms
  • ASIC
  • Static Timing Analysis
  • Computer Architecture
  • Logic Synthesis
  • Primetime
  • Timing Closure

Vinod Bhat's Summary

Vinod Bhat, based in San Jose, California, United States, is currently a ASIC Design Manager at Meta, bringing experience from previous roles at Apple, Intel Corporation and InvenSense, Inc.. Vinod Bhat holds a 2000 - 2002 MS in EE @ Stanford University. With a robust skill set that includes RTL design, SoC, Verilog, Algorithms, ASIC and more, Vinod Bhat contributes valuable insights to the industry. Vinod Bhat has 2 emails and 1 mobile phone number on RocketReach.

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