Vineet Joshi Email
Test Engineer @ TSMC
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Vineet Joshi Location
- Ottawa, ON, CA
Vineet Joshi Work
- 2014 -now Test Engineer @
- 2008 -2014 Senior Logic Design Engineer @
- 2005 -2007 Asic Designer @ Emerging Memory Technology
- 2004 -2004 Fpga Designer @
- 2002 -2002 Fpga Designer @
- 1998 -2001 Asic Design Engineer @ Nortel Networks
Vineet Joshi Education
- University of Toronto
Masters (Electronics Engineering)
2005-2007 - Concordia University
Bachelors (Electronics Engineering)
1991-1995
Vineet Joshi Skills
- Ethernet
- SystemVerilog
- Firmware
- Semiconductors
- Hardware Architecture
- ASIC
- Wireless
- FPGA
- SoC
- Verilog
- VHDL
- Xilinx
- Debugging
- TCL
- Perl
- RTL design
Vineet Joshi Summary
- Vineet Joshi, based in Ottawa, ON, CA, is currently a Test Engineer at TSMC. Vineet Joshi brings experience from previous roles at TSMC, Emerging Memory Technology, Texas Instruments and Hyperchip. Vineet Joshi holds a 2005 - 2007 Masters in Electronics Engineering @ University of Toronto. With a robust skill set that includes Ethernet, SystemVerilog, Firmware, Semiconductors, Hardware Architecture and more. Vineet Joshi has 1 emails on RocketReach.
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