Vinay J Email & Phone Number
Senior Verification Engineer @ Arm
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Vinay J Location
- United States
Vinay J Work
- Senior Verification Engineer @ (March 2023 - Present)
- Silicon Verification Engineer-II @ (March 2022 - March 2023)
- Silicon Verification Engineer @ (July 2020 - February 2022)
- Graduate Technical Intern @ (June 2019 - May 2020)
- System Engineer @ (July 2015 - August 2018)
Vinay J Education
- Portland State University 2018-2020
- Nitte Meenakshi Institute of Technology 2011-2015
- Presidency University Bangalore 2009-2011
Vinay J Skills
- Universal Verification Methodology (UVM)
- SystemVerilog
- Verilog
- C
- SQL
- Hadoop
- C (Programming Language)
- Microsoft Office
- windows
- QuestaSim
- Linux
- Emulation
- Computer Architecture
- cache
- Synopsys tools
- Emulator
- RTL Verification
- FSM
- Functional Verification
- ModelSim
- VCS
Vinay J Summary
- Vinay J, based in United States, is currently a Senior Verification Engineer at Arm. Vinay J brings experience from previous roles at Microsoft, Intel Corporation and LTI - Larsen & Toubro Infotech. Vinay J holds a 2018 - 2020 Portland State University. With a robust skill set that includes Universal Verification Methodology (UVM), SystemVerilog, Verilog, C, SQL and more. Vinay J has 2 emails and 1 mobile phone numbers on RocketReach.
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