Vikranth S Email
Analog layout lead @ Texas Instruments
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Vikranth S Location
- Bengaluru, KA, IN
Vikranth S Work
- 2021 -now Analog layout lead @
- 2019 -2021 Senior Layout Designer @
- 2015 -2019 Layout Design Engineer @
- 2016 -2021 Layout Design Engineer @
- 2017 -2019 Layout Design Engineer @
- 2015 -2017 Layout Design Engineer @ Analog Semiconductors Pvt Ltd
Vikranth S Education
- Visvesvaraya Technological University
Bachelor of Engineering (B.E.) (Electronics and Communications Engineering)
2010-2014
Vikranth S Skills
- Verilog
- VLSI
- Semiconductors
- Microsoft Office
- Cadence Virtuoso
- CMOS
- Analog Circuits
- Layout Design
- IO Design
- Analog layout design
Vikranth S Summary
- Vikranth S, based in Bengaluru, KA, IN, is currently a Analog layout lead at Texas Instruments. Vikranth S brings experience from previous roles at Tessolve and NXP Semiconductors. Vikranth S holds a 2010 - 2014 Bachelor of Engineering (B.E.) in Electronics and Communications Engineering @ Visvesvaraya Technological University. With a robust skill set that includes Verilog, VLSI, Semiconductors, Microsoft Office, Cadence Virtuoso and more. Vikranth S has 3 emails on RocketReach.
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