Vikas Talwar Email
Design Verification Engineer @ Apple
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Vikas Talwar Location
- Munich, BY, DE
Vikas Talwar Work
- Design Verification Engineer @ (December 2019 - Present)
- Pre-Si Verif Engineer @ (September 2017 - November 2019)
- Verification Engineer @ (September 2016 - August 2017)
- Research and Development Engineer @ (November 2014 - July 2017)
Vikas Talwar Education
- Birla Institute of Technology and Science
Master Of Science
Vikas Talwar Skills
- Software Design
- Pli
- Design Patterns
- C
- Specman
- Debugging
- System On A Chip Soc
- Perl
- Functional Verification
- OVM
- Software Architecture
- UVM
- AMBA AHB
- VMM
- Verilog
- UART
- Scrum
- UML
- TCL
- Unified Modeling Language Uml
- Java
- Dpi
- RTL verification
- Application Specific Integrated Circuits Asic
- SoC
- Open Verification Methodology
- VHDL
- EDA
- C++
- Simulation
- SystemVerilog
- Semiconductors
- Software Development
- HMC
- Very Large Scale Integration Vlsi
- I2C
- R&D
- Software Development Life Cycle Sdlc
- Shell Scripting
- DDR
- Application Specific Integrated Circuits
- Very Large Scale Integration
- System on a Chip
- Unified Modeling Language
- Software Development Life Cycle
Vikas Talwar Summary
- Vikas Talwar, based in Munich, BY, DE, is currently a Design Verification Engineer at Apple. Vikas Talwar brings experience from previous roles at Intel Corporation, Socionext Europe and Synopsys Inc. Vikas Talwar holds a Master Of Science @ Birla Institute of Technology and Science. With a robust skill set that includes Software Design, Pli, Design Patterns, C, Specman and more. Vikas Talwar has 1 emails on RocketReach.
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