Vikas Nagaraj Location
- San Jose, CA, US
Vikas Nagaraj Work
- 2019 -now MTS @
- 2018 -2019 Design verification @ Synapse Design Automation Inc.
- 2015 -2018 Verification Engineer @
- 2013 -2015 DV Manager @
- 2011 -2013 Lead DV Engineer @
- 2010 -2011 Principal verification engineer @
- 2010 -2010 Technical Lead @
- 2005 -2010 Hardware Engineer @
- 2004 -2005 Design engineer @
- 2003 -2004 Member technical staff @
- 2000 -2001 design engg @ blorean applied technology
Vikas Nagaraj Education
- Penn State University
Master’s Degree (Systems Engineering)
2016-2018 - Kuvempu Vishwavidyanilaya
Bachelor of engineering (Electronics and communication)
1996-2000
Vikas Nagaraj Skills
- SystemVerilog
- Verilog
- ASIC
- VHDL
- VLSI
- Specman
- SoC
- NCSim
- Functional Verification
- RTL design
- ModelSim
- Perl
- Firmware
- SystemC
- Logic Synthesis
- Illustrator
- Display
- Digital Video
- Microsoft Excel
- Design
- Signal
- Photoshop
- Verification
- Engineering
- Management
- Graphic Design
Vikas Nagaraj Summary
- Vikas Nagaraj, based in San Jose, CA, US, is currently a MTS at AMD. Vikas Nagaraj brings experience from previous roles at Synapse Design Automation Inc. and LSI, an Avago Technologies Company. Vikas Nagaraj holds a 2016 - 2018 Master’s Degree in Systems Engineering @ Penn State University. With a robust skill set that includes SystemVerilog, Verilog, ASIC, VHDL, VLSI and more. Vikas Nagaraj has 3 emails and 1 mobile phone numbers on RocketReach.
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