Veera K. Email
Analog Design Staff Engineer @ Synopsys Inc
5 free lookup(s). No credit card required.
If you need more lookups,
subscriptions start at $34 USD/month.
Veera K. Location
- Bengaluru, KA, IN
Veera K. Work
- Analog Design Staff Engineer @ (September 2024 - Present)
- SOC Logic Design Engineer @ (January 2024 - August 2024)
- Memory characterization engineer @ (January 2022 - January 2024)
- Memory characterization @ SeviTech Systems Pvt. Ltd. (April 2019 - January 2022)
- ams cell characterization engineer @ (September 2016 - April 2019)
Veera K. Education
- Rajiv gandhi university of Knowledge Technologies
Bachelor of Engineering (BE)
2012-2016 - RGUKT NUZVID
Bachelor of Technology - BTech (PUC)
2010-2012
Veera K. Summary
- Veera K., based in Bengaluru, KA, IN, is currently a Analog Design Staff Engineer at Synopsys Inc. Veera K. brings experience from previous roles at Intel Corporation, Qualcomm, SeviTech Systems Pvt. Ltd. and Wipro. Veera K. holds a 2012 - 2016 Bachelor of Engineering (BE) @ Rajiv gandhi university of Knowledge Technologies. Veera K. has 1 emails on RocketReach.
Looking for a different Veera K.?
Find contact details for 700 million professionals.
G2 Crowd Trusted
300K+ Plugin Users
© 2026 RocketReach.co