Veera Durga Email
Analog Schematic Design Engineer @ Arasan Chip Systems Inc.
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Veera Durga Location
- Thoothukudi, TN, IN
Veera Durga Work
- 2019 -now Analog Schematic Design Engineer @
Veera Durga Education
- St. Mother Theresa Engineering College 2015-2019
Veera Durga Skills
- Design Analysis
- Mixed-Signal Integrated Circuits
- USB2.0
- MIPI
- Transceivers
- Transistors
- CMOS
- Cadence Spectre
- Analog Circuit Design
- Analog Circuits
- Integrated Circuit Design
- Cadence Analog Artist
Veera Durga Summary
- Veera Durga, based in Thoothukudi, TN, IN, is currently a Analog Schematic Design Engineer at Arasan Chip Systems Inc.. Veera Durga holds a 2015 - 2019 St. Mother Theresa Engineering College. With a robust skill set that includes Design Analysis, Mixed-Signal Integrated Circuits, USB2.0, MIPI, Transceivers and more. Veera Durga has 1 emails on RocketReach.
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