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veda s Location
Karnataka, India
veda s Work
2024 -now DFT Engineer @
2022 -2023 DFT-Trainee @
2022 -2023 Apprentice @
veda s Education
Cambridge Institute of Technology 2024-2026
Visvesvaraya Technological University 2003-2009
veda s Skills
Universal Verification Methodology (UVM)
SystemVerilog
Mentor Graphics
QuestaSim
JTAG 1149,1687
MBIST
OCC
Simulations
Synthesis
Test Compression
Digital Electronics
EDT
ASIC Flow
LBIST
Automatic Test Pattern Generation (ATPG)
BIST
Scan Insertion
Unix
TCL
Verilog
Cadence Virtuoso
Lecturing
University Teaching
Higher Education
E Learning
Research
Statistics
veda s Summary
veda s, based in Karnataka, India, is currently a DFT Engineer at organization. veda s brings experience from previous roles at VLSIGuru Training Institute. veda s holds a 2024 - 2026 Cambridge Institute of Technology. With a robust skill set that includes Universal Verification Methodology (UVM), SystemVerilog, Mentor Graphics, QuestaSim, JTAG 1149,1687 and more. veda s has 1 emails on RocketReach.
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