Tuo Wang Email & Phone Number
Member of Technical Staff @ OpenAI
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Tuo Wang Location
- San Jose, CA, US
Tuo Wang Work
- 2024 -now Member of Technical Staff @
- 2019 -2024 ASIC and FPGA Engineer @
- 2018 -2019 Senior GPU Verification Engineer @
- 2017 -2018 Verification Lead @
- 2015 -2017 Senior Engineer @
- 2013 -2015 Senior Verification Engineer @
- 2013 -2013 Marster Co-op @
Tuo Wang Education
- University of Southern California
Master of Science (MS) (Electrical Engineering-VLSI)
2011-2013 - Dalian University of Technology
BS (Electrical and Electronics Engineering)
2007-2011
Tuo Wang Skills
- C
- Cadence Virtuoso
- ModelSim
- Verilog
- System Verilog
- Perl
- RTL design
- Static Timing Analysis
- NC-Verilog
- ASIC design
- Computer Architecture
- Synopsys Design Compiler
- Synopsys VCS
- Synopsys Primetime
- UPF
- Cadence Conformal LEC
- UVM
- Coverage
- VMM
- Power Aware Verification
- SQL
- Requirements Analysis
- ASIC
- Project Management
- PowerPoint
- Microsoft Office
- Nc Verilog
Tuo Wang Summary
- Tuo Wang, based in San Jose, CA, US, is currently a Member of Technical Staff at OpenAI. Tuo Wang brings experience from previous roles at Facebook, NVIDIA, NovuMind Inc. and Seagate Technology. Tuo Wang holds a 2011 - 2013 Master of Science (MS) in Electrical Engineering-VLSI @ University of Southern California. With a robust skill set that includes C, Cadence Virtuoso, ModelSim, Verilog, System Verilog and more. Tuo Wang has 2 emails and 5 mobile phone numbers on RocketReach.
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