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Tung Pham Location
Austin, TX, US
Tung Pham Work
System Validation Engineer @ (June 2022 - Present)
System Test Technical Lead @ (January 2019 - June 2022)
Senior Engineering Manager and Program Manager, Digital Test Development @ (September 2016 - January 2019)
Processor Test Engineering Manager @ (April 2013 - September 2016)
P-Series Functional Test Lead @ (January 2006 - April 2013)
DFT and DFX Design and Product Development Engineer @ (January 2000 - December 2005)
DFT and DFX Design and Verification Engineer @ Motorola Inc (January 1999 - January 2000)
Tung Pham Education
University of Michigan
MSEE (VLSI)
1998-1999
University of Michigan
BSEE (VLSI)
1996-1998
Tung Pham Skills
ASIC
ATPG
Application-Specific Integrated Circuits (ASIC)
BIST
Boundary Scan
C
DFT
Debugging
Embedded Systems
IC
Integrated Circuits (IC)
Integration
Logic Design
Manual Testing
Perl
Processors
Project Engineering
Silicon Validation
Simulations
SoC
Static Timing Analysis
System Testing
System on a Chip (SoC)
Team Building
Team Leadership
Testing
Unix
Verilog
Strategic Planning
Engineering
Management
Tung Pham Summary
Tung Pham, based in Austin, TX, US, is currently a System Validation Engineer at Apple. Tung Pham brings experience from previous roles at Intel Corporation and IBM. Tung Pham holds a 1998 - 1999 MSEE in VLSI @ University of Michigan. With a robust skill set that includes ASIC, ATPG, Application-Specific Integrated Circuits (ASIC), BIST, Boundary Scan and more. Tung Pham has 2 emails and 2 mobile phone numbers on RocketReach.
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