Staff Verification Engineer @ (July 2012 - November 2013)
ASIC Design Lead @ Aeroflex (January 2011 - January 2011)
Verification Engineer @ (January 2009 - January 2010)
CAD Manager @ Cypress Semiconductor (September 2008 - March 2009)
Staff Engineer, CAD Manager @ (June 2004 - September 2008)
Principal Engineer - ASIC Design @ Comsilica, Inc. (January 2001 - January 2002)
Principal Engineer - ASIC Design @ Celis Semiconductor (October 1997 - February 2001)
Staff Engineer, Design @ MINC Inc. (August 1988 - May 1996)
Design Engineer @ (June 1984 - August 1988)
Troy Meester Education
University of Colorado Colorado Springs 2009-2009
Iowa State University
BSCE (Computer Engineering)
1980-1984
Troy Meester Skills
ASIC
Cadence
EDA
Embedded Systems
Engineering Management
FPGA
Functional Verification
Logic Analyzer
Open Verification Methodology
PCIe
Simulations
SoC
SystemC
SystemVerilog
VHDL
Verilog
Customer Service
Graphic Design
Verification
Troy Meester Summary
Troy Meester, based in Colorado Springs, CO, US, is currently a Principal Verification Engineer at FirstPass Engineering. Troy Meester brings experience from previous roles at Sand Circuits Inc, PMC-Sierra, Aeroflex and LSI Corporation. Troy Meester holds a 2009 - 2009 University of Colorado Colorado Springs. With a robust skill set that includes ASIC, Cadence, EDA, Embedded Systems, Engineering Management and more. Troy Meester has 1 emails and 3 mobile phone numbers on RocketReach.
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