Triet le Email
Staff Design Verification Engineer @ MediaTek
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Triet le Location
- Singapore
Triet le Work
- Staff Design Verification Engineer @ (June 2023 - Present)
- Senior Design Verification Engineer @ (October 2020 - June 2023)
- Senior Hardware Design Engineer @ (March 2016 - October 2020)
Triet le Education
- Bach Khoa University (fomerly Ho Chi Minh City University of Technology)
Bachelor of Engineering - BE (Mechatronics, Robotics, and Automation Engineering)
2011-2016
Triet le Skills
- ARM Architecture
- ARM Assembly
- Cadence Perspec system verifier
- English
- Formal Verification
- Functional Verification
- Leadership
- Management
- Problem Solving
- Programming
- Project Management
- RTL Verification
- Research
- Synopsys Design Compiler
- Synopsys Formality
- Synopsys IC Compiler
- System Verification
- System on a Chip (SoC)
- SystemVerilog
- Systemverilog Assertion
- Universal Verification Methodology (UVM)
- Vcs
- Verilog
Triet le Summary
- Triet le, based in Singapore, is currently a Staff Design Verification Engineer at MediaTek. Triet le brings experience from previous roles at MediaTek and Renesas Design Vietnam Co., Ltd.. Triet le holds a 2011 - 2016 Bachelor of Engineering - BE in Mechatronics, Robotics, and Automation Engineering @ Bach Khoa University (fomerly Ho Chi Minh City University of Technology). With a robust skill set that includes ARM Architecture, ARM Assembly, Cadence Perspec system verifier, English, Formal Verification and more. Triet le has 1 emails on RocketReach.
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