Tom Romano's Location
Herzliya, IL
Tom Romano's Work
- Chip Design Team Lead @ Nuvoton Technology Israel Ltd
- VLSI Design Manager @ Parallel Wireless
- VLSI Integration lead @ Qualcomm
- VLSI Chip Lead @ Intel Corporation
- Senior HW Logic Design Engineer @ Intel Corporation
- HW Logic Design Engineer @ Intel Corporation
- Operations Team Leader @ Israeli Military Intelligence
Tom Romano's Education
- Tel Aviv University
B.Sc (Electrical Engineering)
2008 - 2012
Tom Romano's Skills
- VLSI
- RTL design
- Verilog
- ESL
- IT Solutions
- ASIC
- Logic Design
- C++
- SystemC
- TLM
Tom Romano's Summary
Tom Romano, based in Herzliya, IL, is currently a Chip Design Team Lead at Nuvoton Technology Israel Ltd, bringing experience from previous roles at Parallel Wireless, Qualcomm and Intel Corporation. Tom Romano holds a 2008 - 2012 B.Sc in Electrical Engineering @ Tel Aviv University. With a robust skill set that includes VLSI, RTL design, Verilog, ESL, IT Solutions and more, Tom Romano contributes valuable insights to the industry. Tom Romano has 2 emails on RocketReach.
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