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Tom Jose Location
Toronto, ON, CA
Tom Jose Work
2026 -now Senior Staff Engineer @
2024 -2026 Senior Member of Technical Staff @
2021 -2024 MTS Silicon Design Engineer @
2021 -2021 ASIC Design Engineer @
2019 -2021 ASIC DESIGN ENGINEER @
2015 -2019 Design Engineer @
2014 -2015 Graduate Student @
2009 -2014 SENIOR DESIGN ENGINEER @
Tom Jose Education
University of Cincinnati
Master's Degree (Badminton Club)
2014-2015
College of Engineering, Trivandrum
BTECH (College Football Team)
2005-2009
ST ANTONEYS PUBLIC SCHOOL ANAKKAL KANJIRAPPALLY
High School (School Football Team)
1991-2005
Tom Jose Skills
FPGA
VLSI
ModelSim
Verilog
RTL design
VHDL
C
Integrated Circuit Design
Xilinx
RTL coding
Static Timing Analysis
Functional Verification
C++
ASIC/FPGA DESIGN
Hardware Verification
VALIDATION
Simulations
EDA
Digital Signal Processors
Matlab
PCIe
DDR2
DDR3
Xilinx ISE
TCL
Perl
Synopsys tools
Synopsys Primetime
BIST
DFT
DFT Compiler
SystemVerilog
Debugging
SPICE
Algorithms
Logic Synthesis
I2C
Altera Quartus
ASIC
Embedded Systems
SPI
Electrical Engineering
Leadership
PowerPoint
Illustrator
Engineering
Java
Microsoft Excel
Design
Management
Hardware Architecture
Tom Jose Summary
Tom Jose, based in Toronto, ON, CA, is currently a Senior Staff Engineer at Intel. Tom Jose brings experience from previous roles at Synopsys Inc, AMD and Tactual Labs Co.. Tom Jose holds a 2014 - 2015 Master's Degree in Badminton Club @ University of Cincinnati. With a robust skill set that includes FPGA, VLSI, ModelSim, Verilog, RTL design and more. Tom Jose has 3 emails on RocketReach.
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