Tom Email & Phone Number
Design Verification Engineer @ Eridu AI
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Tom Location
- Santa Clara, CA, US
Tom Work
- Design Verification Engineer @ (July 2025 - Present)
- Verification Engineer @ (March 2018 - June 2025)
- Technical Manager @ Yangtze Memory Technologies, Inc. (November 2017 - February 2018)
- Senior Design Verification Engineer @ (October 2015 - November 2017)
- Design Verification Engineer @ (June 2015 - October 2015)
- Verification Engineer Intern @ (December 2014 - June 2015)
- Senior Media Systems Assistant @ (May 2014 - December 2014)
- Master in Computer Science @ (January 2014 - June 2015)
- Senior Verification Engineer @ (May 2012 - July 2013)
- Verification Engineer @ (September 2010 - May 2012)
- Verification Engineer @ (June 2009 - September 2010)
Tom Education
- Santa Clara University
Master's Degree (Computer Science)
2014-2015 - Huazhong University of Science and Technology
Master's degree (Software Engineering)
2007-2009
Tom Skills
- SystemVerilog
- Verilog
- UVM
- VMM
- SVA
- Assertion Based Verification
- VHDL
- Perl
- Python
- Machine Learning
- C++
- VCS
- Verdi
- NCSIM
- Semiconductors
- GNU Make
- GNU Compiler Collection (GCC)
- Processors
- Makefile
- SoC
- FPGA
- Functional Verification
- Computer Architecture
- IP Addressing
- C
- Top level verification
- IP verification
- ASIC
- Java
- JavaScript
- Testing
- Xilinx Vivado
- Linux
- Batch Files
- System C
- Assembling
- ARM
- Bash
- Emacs
- Vim
- OpenCV
- RTL Design
- Matlab
- TexLive
- DPI-C
- MIPS
- Functional Coverage
- NAND Flash
- SimVision
- Data Analysis
- Information Security
- Dpi C
- VLSI
- Software
- TCL
- Developers
- ModelSim
- Gnu Compiler Collection Gcc
- CSS
- HTML5
- Gnu Compiler Collection
Tom Summary
- Tom, based in Santa Clara, CA, US, is currently a Design Verification Engineer at Eridu. Tom brings experience from previous roles at PetaIO, Yangtze Memory Technologies, Inc., Sandisk and Esencia Technologies Inc.. Tom holds a 2014 - 2015 Master's Degree in Computer Science @ Santa Clara University. With a robust skill set that includes SystemVerilog, Verilog, UVM, VMM, SVA and more. Tom has 2 emails and 2 mobile phone numbers on RocketReach.
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Rajesh Sharma
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Eric Yeh
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Brian Kinard
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Omar Hassen
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Sunnyvale, CA, US
Amir Helweh
VP Of System Engineering
San Jose, CA, US
Syed Ahmed
Vice president IC Design
Sunnyvale, CA, US
Kamaljit Dhooria
Director Design Verification
San Jose, CA, US
Jerry Martinson
Distinguished Engineer
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Colin Rhodes
VP Business Development EMEA
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Bassam al Mutawa
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Kuwait
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