Tobias Becker Email
Director - ASIC Design Engineering @ NVIDIA
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Tobias Becker Location
- London, GB
Tobias Becker Work
- Director - ASIC Design Engineering @ (January 2026 - Present)
- Director - Silicon Engineering @ (May 2025 - January 2026)
- VP Of Research and Development @ (September 2020 - May 2025)
- VP Of Research @ (December 2019 - August 2020)
- Head of MaxAcademy @ (December 2014 - November 2019)
- Postdoctoral Researcher @ (September 2010 - December 2014)
- Intern @ (June 2005 - February 2006)
- Intern @ Xilinx (January 2004 - January 2004)
Tobias Becker Education
- Imperial College London
PhD (Computing)
2005-2010 - Karlsruhe Institute of Technology (KIT)
Dipl. Ing (Electrical Engineering and Information Technology)
1998-2005
Tobias Becker Skills
- FPGA
- Algorithms
- High-performance computing
- Custom computing
- Matlab
- LaTeX
- Parallel Computing
- Programming
- Signal Processing
- Reconfigurable Computing
- VHDL
- Simulations
- Computer Vision
- Scientific Computing
- Machine Learning
- Computer Science
- CUDA
- Computer Architecture
- Parallel Programming
- Field-Programmable Gate Arrays (FPGA)
- Capital Management
- Field Programmable Gate Arrays Fpga
- Computing
- Engineering
- Software
- Research
- Trading
- High Performance Computing
- Field Programmable Gate Arrays
Tobias Becker Summary
- Tobias Becker, based in London, GB, is currently a Director - ASIC Design Engineering at NVIDIA. Tobias Becker brings experience from previous roles at Groq and Maxeler Technologies. Tobias Becker holds a 2005 - 2010 PhD in Computing @ Imperial College London. With a robust skill set that includes FPGA, Algorithms, High-performance computing, Custom computing, Matlab and more. Tobias Becker has 4 emails on RocketReach.
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