Physical Design Engineer @ (May 2022 - April 2023)
Physical Design Engineer @ (May 2021 - May 2022)
Physical Design Engineer @ (February 2020 - May 2021)
Physical Design Engineer @ (April 2019 - February 2020)
Analog Layout Designer @ (June 2018 - April 2019)
Physical Design Engineer @ (June 2013 - May 2018)
Physical Design Engineer @ (December 2012 - June 2013)
Physical Design Engineer and Circuit Design Engineer @ (February 2004 - December 2012)
IC Layout and Physical Verification @ Indigo System (June 2003 - February 2004)
Custom Circuit Design and Implementation Engineer @ Trimedia (December 2000 - March 2003)
Circuit Design Engineer @ Motorola (January 1988 - December 2000)
Toan le Education
Virginia Tech
Master's degree (Electrical and Electronics Engineering)
1986-1987
Virginia Tech
Bachelor's degree (Electrical and Electronics Engineering)
1984-1986
Toan le Skills
Cadence Virtuoso
Redhawk Em/Ir
Drc/Lvs/Parasitic Extraction
SPICE
Post Silicon Debug
HSPICE
RTL design
Drc/Lvs/Parasitic
Design Rule Checking Drc
Speed Path Debug
Physical Compiler
Integrated Circuits Ic
SoC
IC layout
Primetime
Synopsys Primetime
Timing Closure
Package Hspice Sim
DRC
Physical Design
Static Timing Analysis
Low Power Design
Verdi/Lec
Compilers
IC
Toan le Summary
Toan le, based in Austin, TX, US, is currently a ASIC Physical Design Engineer at Cisco. Toan le brings experience from previous roles at Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab and Qualcomm. Toan le holds a 1986 - 1987 Master's degree in Electrical and Electronics Engineering @ Virginia Tech. With a robust skill set that includes Cadence Virtuoso, Redhawk Em/Ir, Drc/Lvs/Parasitic Extraction, SPICE, Post Silicon Debug and more. Toan le has 2 emails and 2 mobile phone numbers on RocketReach.
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