Tim Lantz Email & Phone Number
Senior Principal Engineer @ Tenstorrent Inc.
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Tim Lantz Location
- Scotts Valley, CA, US
Tim Lantz Work
- 2025 -now Senior Principal Engineer @
- 2021 -2025 Principal Engineer @
- 2017 -2021 Senior SoC Physical Design Lead, Custom CPU Product Development @
- 2005 -2017 Technical Leader @
- 2001 -2005 Hardware Engineer @
- 2003 -2003 Consultant @ Monterey Design Systems
- 1998 -2001 Hardware Engineer @
- 1996 -1998 Hardware Engineer @ Silicon Engineering Inc. (SEI)
Tim Lantz Education
- University of California, Santa Cruz 1992-1996
Tim Lantz Skills
- Hardware Architecture
- Logic Design
- Computer Architecture
- Floorplanning
- Computer Hardware
- Debugging
- Digital IC Design
- Logic Synthesis
- Functional Verification
- Perl
- RTL design
- ARM
- DFT
- Microprocessors
- PCIe
- UVM
- ASIC
- Processors
- VMM
- VLSI
- Verilog
- Integrated Circuit Design
- Formal Verification
- NCSim
- TCL
- Integrated Circuits Ic
- Application Specific Integrated Circuits Asic
- FPGA
- RTL coding
- SoC
- VHDL
- EDA
- Primetime
- Timing Closure
- SystemVerilog
- Physical Design
- Static Timing Analysis
- Digital Signal Processors
- Low Power Design
- Very Large Scale Integration Vlsi
- Hardware
- IC
- Application Specific Integrated Circuits
- Integrated Circuits
- Very Large Scale Integration
Tim Lantz Summary
- Tim Lantz, based in Scotts Valley, CA, US, is currently a Senior Principal Engineer at Tenstorrent. Tim Lantz brings experience from previous roles at Intel Corporation, Cisco Systems and Tau Networks. Tim Lantz holds a 1992 - 1996 University of California, Santa Cruz. With a robust skill set that includes Hardware Architecture, Logic Design, Computer Architecture, Floorplanning, Computer Hardware and more. Tim Lantz has 2 emails and 1 mobile phone numbers on RocketReach.
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