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Tim Callahan Location
Cupertino, CA, US
Tim Callahan Work
Principal Compiler Engineer @ (December 2025 - Present)
Compiler Engineer @ (June 2024 - June 2025)
Staff Software Engineer @ (August 2020 - August 2023)
Distinguished Member Of Technical Staff @ (October 2017 - October 2019)
Senior Principal Software Engineer @ (January 2015 - January 2017)
Senior Staff Engineer (Synthesis) @ Tabula (January 2008 - January 2015)
Systems Scientist @ (January 2005 - January 2008)
Compiler Engineer @ SRC Computers (January 2003 - January 2004)
Advanced Technology Group, Research Intern @ (April 1998 - December 1998)
Graduate Research Assistant @ (January 1992 - January 1994)
Undergraduate Research Assistant @ Minnesota Supercomputing Institute (January 1988 - January 1990)
Tim Callahan Education
University of California, Berkeley
Ph.D (M.S., Computer Science)
University of Cambridge
Diploma (with Distinction, Computer Science)
University of Minnesota
Bachelors (Summa Cum Laude, Electrical Engineering)
Tim Callahan Skills
Acceleration
Accelerator
Algorithms
Application-Specific Integrated Circuits (ASIC)
Bazel
C
C++
C++11
Code Generation
Compiler Construction
Compiler Development
Compiler Optimization
Compilers
Computer Architecture
Congestion Management
Continuous Integration
Data Structures
Debugging
Digital Signal Processors
Distributed Systems
Domain Specific Languages
EDA
Embedded Systems
Equivalence Checking
FPGA
Field-Programmable Gate Arrays (FPGA)
Flow Control
Git
Hardware Architecture
Hardware Description Language
High Level Synthesis
High Performance Computing
High Performance Computing (HPC)
Integrated Circuits (IC)
Kernel Programming
LLVM
Large Language Models (LLM)
Linux
Logic Synthesis
MLIR
Machine Learning
Microprocessors
Optimization
Parallel Computing
Parallel Programming
Performance Tuning
Processors
Programming
Python
RISC-V
Research and Development (R&D)
Rust (Programming Language)
SIMD
SPMD
Simulations
SoC
Software Development
Standard Template Library (STL)
Start-ups
TensorFlow
TinyML
Transformers
VLIW
Vectorization
Verilog
Tim Callahan Summary
Tim Callahan, based in Cupertino, CA, US, is currently a Principal Compiler Engineer at Efficient Computer. Tim Callahan brings experience from previous roles at MatX, Google, Wave Computing and Cadence Design Systems. Tim Callahan holds a Ph.D in M.S., Computer Science @ University of California, Berkeley. With a robust skill set that includes Acceleration, Accelerator, Algorithms, Application-Specific Integrated Circuits (ASIC), Bazel and more. Tim Callahan has 6 emails and 2 mobile phone numbers on RocketReach.
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